Design For Test (DFT) Services Available

Our corporate mission is to provide proven DFT expertise using any industry-standard Design-for-Test tool-sets and to ensure an optimized design done the way you want it done!

Combining expert knowledge with professional support processes, SiliconAid can reduce your time-to-market, improve your test predictability, and ensure that your silicon comes up quickly and painlessly. SiliconAid services customers worldwide and has a broad range of consulting options to suit your budget and schedule.

• DFT Evaluation & Assessment
• DFT Methodology Development
• DFT Automation
• Design vs Test Time
• ATPG Library Generation including Cell-Aware

• Scan Insertion
• Add/Optimize Test Control Logic
• ATPG Vector Generation
• Memory BIST
• Logic BIST
• JTAG Generation
• Fault Simulation & Grading
• Manufacturing Test Program Debug
• Failure Analysis Assistance

• DFT Classes and Educational Services

• Expert in All Major EDA DFT Vendors

(Cadence, Mentor Graphics, Synopsys, Syntest)

• Senior DFT Engineers
• World-Wide Support
• DFT Architecture
• DFT RTL Development
• Scan Compression
• Stuck-AT, Transition, Path Delay, IDDQ, Cell-Aware
• Fault Diagnostics and Analysis/Identification
• Root Cause failure identification
• DFT Gate & RTL Level Simulation/Verification
• Embedded IP Testing - ARM, DDR, Memory, Serdes, more..
• Expert in IEEE Standards (1149.1, 1149.6, 1687, 1500, 1838)
• IJTAG - Automated and Custom Consulting Services
• Post Silicon Support
• DFT Related Timing Constraints