SAJESM - SiliconAid JTAG and IJTAG Environment Tool Suite
SAJE is the SiliconAid Suite
of JTAG and IJTAG related standards focused tools for chip development,
verification, validation and patterns generation of ATE, Board, and
System Test. Each tool can be used as a point tool by itself to
compliment other tools in your flow. However, the SAJE Tool Suite used
together in a flow can provide a total solution that also leveraging
previous steps for debug and analysis.
The tools in the SAJE tool suite compliment other EDA tools and can be used in concert to enhance the overall flow.
Below is a brief description of the SAJE tools and a link for each tool to get additional information.
JTSTM - (JTAG / IJTAG Insertion) - Creates all the structures required for IJTAG compliant designs. User controlled SIB locations and IJTAG network creation. Creates all connections to and from user selected IP and generates chip level ICL file. Supports simple to complex user specified IJTAG structures including multiple levels of hierarchical. Click for details |
JTAG
Verification (JTVTM)
- IEEE 1149.1, 1149.6, and 1687 (IJTAG) Semantic & Syntax checking,
Verification, and Pattern Generation
-
IEEE 1149.6 (Feature Option) Click for details |
JTAG Debugger (JTDTM)
- Interactive and intuitive JTAG debugger. Drives hardware via the JTAG
interface and displays captured internal register values, creates waveforms, and
much more. Click for details |
JTNTM - IP Network Analysis (IJTAG and 1149.1-2013 Embedded IP) - Interactive network analysis and pattern generation tool supporting both IEEE 1687(IJTAG) and IEEE 1149.1-2013 standards. Allowing the user to read in standard patterns from each embedded Intellectual Property (IP) in the architecture and generate chip level patterns that can be used for simulation, ATE, Board, and more. Click for details |
IJTAG (1687) Embedded IP- Embedded IP testing using IJTAG is now supported by our full suite of SAJE tools. Please see the SAJE software overview and also contact us directly for more information and product presentation and/or demos! Click for details |
1149.1-2013
Embedded IP - Embedded IP testing using the new 1149.1-2013
is now supported by our full suite of SAJE tools.
Please see the SAJE software overview and also contact us directly for more information and product presentation and/or demos! Click for details |